This invention relates, in general, to semiconductor devices, and more particularly, to improved integrated high voltage transistors having minimum transistor to transistor crosstalk.
When transistors are used in AC or multiphase DC applications, it is desirable to have multiple integrated high voltage current sources with gate control. When these high voltage devices are integrated on a single substrate, crossstalk between the transistors is a problem.
Conventional P-N junction isolation is used to prevent interaction between multiple devices formed on the same substrate, P-N junction isolation is formed by diffusing dopants of the same conductivity type as the substrate and opposite the epitaxial layer from the surface of the epitaxial layer down to the substrate. Several isolation regions are formed to create isolated epitaxial regions, where active devices are formed. When using P-N junction isolation, a thin, lightly doped epitaxial layer must be used so that only a short isolation diffusion time is required. A short isolation diffusion time reduces the amount of dopants outdiffusing from the substrate into the epitaxial layer. The use of a lightly doped substrate also reduces the amount of substrate outdiffusion. The outdiffusion of the substrate dopants into the epitaxial layer may detrimentally affect the voltage capability of the device. Increasing the thickness of the epitaxial layer does not increase the voltage capability of the device because this requires longer isolation diffusion times, resulting in greater substrate outdiffusion.
Another disadvantage of using a lightly doped substrate is that not enough isolation is provided to prevent crosstalk from one transistor to another when several transistors are formed on a single substrate. A way of reducing the crosstalk between these integrated transistors is to provide a heavily doped substrate. A heavily doped substrate provides for higher recombination of carriers injected into the substrate, thus preventing the carriers from reaching the adjacent transistor and turning it on. However, as has been discussed above, the more heavily doped the substrate, the greater the outdiffusion of the substrate into the epitaxial layer when the isolation regions are diffused. Thus, a lightly doped substrate, which provides only approximately 10 dB (decibels) of isolation has been used in the prior art. Isolation as used here means the current ratio when one isolated region is forward biased with respect to the substrate and an adjacent isolated region is reverse biased with respect to the substrate. This amount of isolation is not enough to prevent crosstalk in multiphase circuits, for example. Consequently, each phase of a multiphase circuit of the prior art had to be made in a separate chip. It would be desirable to form multiple high voltage transistors on a single substrate.
A way of increasing the voltage capability of devices formed with conventional P-N junction isolation has been achieved by using REduced SURface Field (RESURF) technology. A RESURF structure is comprised of a lightly doped substrate and a thin epitaxial layer having a reduced doping level at the surface where the junctions are formed. Although a higher voltage device may be attainable using RESURF, a lightly doped substrate must also be used in this technology, which still results in devices having severe crosstalk. Moreover, the use of RESURF technology results in devices having fairly high saturation voltages.
Another method of obtaining isolation between active device regions is provided by the use of dielectric isolation. However, due to the high cost of forming dielectric isolation, it would be desirable to use a method which is simpler and of lower cost.
Accordingly, it is an object of the present invention to provide an improved method of fabricating integrated high voltage transistors having minimum transistor to transistor crosstalk.
Another object of the present invention is to provide integrated transistors having higher breakdown voltages than in the past.
A further object of the present invention is to provide integrated high voltage transistors having lower saturation voltages.
An additional object of the present invention is to provide a method of fabricating integrated high voltage transistors which is simple and of low cost.
Yet another object of the present invention is to provide integrated high voltage transistors having lower on-voltages.